525.612.81 - Computer Architecture

Expanded Course Description

The course will use hardware description languages to both describe and simulate many of these elements.

Languages will include VHDL, Verilog and System Verilog but will focus primarily on Verilog. The course will use an FPGA evaluationboard and labs to supplement the lecture material using the discussion form as a means of coordinating and assisting the student. Simulation tools will also be used. In place of exams, a class project with presentation will be done at the end of the semester. The presentation will be recorded via Zoom and provided for following years classes. 

A prerequisite for this class is 525.442 FPGA Design using VHDL or prior knowledge of a hardware description language forFPGA design.

Course Structure

The course content is divided into modules. Course Modules can be accessed by clicking Course Content on the left menu. A module will have several sections including the overview, content, readings, discussions, and assignments. Students are encouraged to preview all sections of the module before starting. Most modules run for a period of seven (7) days, exceptions are noted on the Course Outline page. Student’s will be able to access the reading material two day’s earlier, however the discussion topic and homework submittal will be scheduled during a 7 day period. Students should regularly check the Calendar and Announcements for assignment due dates. Homework problems will be required for each module with the exception of Modules 12 and 13. In the place of exams, the students will do one research project and document with a report, and present a 30 minute presentation during the last week of the class. The school is loaning the student a FPGA Evaulation board (Nexys 4 DDR or Nexys A7) and lab supplies for the duration of the class. This equipment should be returned to the school at the end of the semester unless prior arrangements are made(such as using the FPGA board in a following class).

Course Topics

• Instruction Set Architecture
  
  • MIPS
    
  • Other ISA
    
  • Tool Set
    
• Digital Logic Design
  
  • Combinatoric Logic Design
    
  • Sequential Design
    
  • System Verilog
    
  • VHDL
    
  • Verilog
    
• Fixed Point Arithmetic
  
  • Addition and Subtraction
    
  • Multiplication
    
  • Division
    
• Floating Point Arithmetic
  
  • Nominclature
    
  • Precision Issues
    
  • Floating Point Add/Subtract
    
  • Floating Point Multiply and Divide
    
  • Parallelism
    
• Single Cycle CPU
  
  • Definitions
    
  • Verilog
    
  • Simulation
    
  • Interrupts and Exceptions
    
• Multicycle CPU
  
  • State machine design
    
  • Verilog Implementation and Simulataion
    
• Pipeline Processing
  
  • Basic Design
    
  • Hazard Conditions
    
  • Pipeline Examples
    
  • Pipeline Control for Hazards
    
  • Exceptions and Interrupts
    
  • Verilog Implementation
    
• Floating Point Pipeline CPU
  
  • Instruction Level Parallelism
    
  • Example Pipeline Chips
    
  • Floating Point Pipelined Processor
    
  • Verilog Implementation
    
• Memory Subsystems
  
  • Intro to Memory Subsystems
    
  • Memory Hierarchy, Cache
    
  • Performance Measurement
    
  • Associative Cache
    
  • Multi-level Cache
    
  • Memory Failures
    
• Memory Subsystems - Virtual Memory
  
  • Intro to Virtual Memory Systems
    
  • Address Translation
    
  • Fast Translation using TLB
    
  • Finite State Machine Cache
    
  • Mechanism of TLB-Based MIPS memory Management
    
  • Dedicated TLB and Cache for Instruction and Data
    
  • MIPS Pipeline Cache Example
    
  • Simulation Results
    
• Computer I/O Subsystems
  
  • Processor I/O
    
  • Processor Bus Operations
    
  • I/O Systems
    
  • I/O Protocols
    
  • MIPSfpga I/O
    
  • I/O  Peripherals
    
  • Interrupts and Timers
    
  • I/O Analog
    
  • I/O Sensors
    
  • I/O Display
    
  • I/O Wireless
    
  • Computers Systems I/O
    
  • Peripheral I/O - Disk and RAID
    
• Parallel Processing
  
  • Intro to Parallel Processing an Measures and Scaling
    
  • Instruction and Data Streams
    
  • Multithreading and Multicore
    
  • Examples
    
  • Verilog Examples
    
  • GPU an Classifying GPUs
    
  • Modern GPU Computing
    
• Computer Networks, Clusters and Multiprocessing
  
  • Intro to Multiprocessing
    
  • Grid Computing and Interconnection Networks
    
  • Computing Clusters and Performance Measurements
    
  • Conclusions
    

Course Goals

To provide the students with the underlying foundation of computer architecture with the goal of providing a framework to identify and understand the underlying technology that comprises a modern computer system.

Course Learning Outcomes (CLOs)

• Describe elements of computer architecture in terms of three levels: Computer instruction set, subsystems and connections and digital logic levels.
• Identify instruction set categories from Complex instruction set computers to Reduced Instruction Set Computers.
• Recognize the subsystem elements and identify both advantages and disadvantages pertaining to performance and complexity.
• Define underlying math algorithms that are implemented as computer arithmetic and trace their performance in hardware implementations.
• Map architecture subsystems into digital hardware approaches.
• Perform architecture dissection on a commercial processor, identifying subsystem components, connections, and performance limitations.

Textbooks

Required

Patterson, David A., Hennessy, John L., Computer Organization and Design, MIPS Edition, The Hardware/Software Interface, Sixth Edition, 2021, Morgan Kaufmann Publishing ISBN 978-0-12- 820109-1.

Recommended

The Discussion Forum will use a digital simulation package by Xilinx (Vivado). This is a free package, but due to their size, thestudent should start to download and install them as early as possible. For the Spring 20219 class, we will use Vivado version 2020.2.

Textbook information for this course is available online through the appropriate bookstore website: For online courses, search theMBS website at http://ep.jhu.edu/bookstore.

In some modules, e-book chapters may also be required, which will be made available through The Sheridan Libraries e-reserves system.

Required Software

Xilinx Vivaldo, Version 2020.2 (or Newer)

Xilinx Vivado is licensed; however a free Web license is offered by Xilinx, Available via http://www.xilinx.com/support/download.html

This software will simulate Verilog, and includes designs which will be used to illustrate digital design concepts, and demonstrate floating point. It should be noted that this is the same software that is used in the VHDL design class and System on a Chip class also offered at Johns Hopkins..

FPGA Hardware and Lab Equipment

The school is loaning the student a FPGA Evaluation board (Nexys 4 DDR or Nexys A7) and lab supplies for the duration of the class. This equipment should be returned to the school at the end of the semester unless prior arrangements are made (such as using the FPGA board in a following class). Due to Covid, we will attempt to mail out the boards and lab kits to everyone with the exception of those who work iin the Columbia area or those students who work at APL. Students should receive a FedEx package with a prepaid shipping lab. Please keep the second box and label to return your hardware. The school will be auditing the return so that futureclasses can use the equipment.

Student Coursework Requirements

It is expected that each class will take approximately 8-12 hours per week to complete. Here is an approximate breakdown: reading the assigned sections of the texts (approximately 2–3 hours per week) as well as some outside reading, listening to the audio annotated slide presentations (approximately 1–2 hours per week), and writing/programming assignments (approximately 2-4 hours per week). The should also be about 3 hours discussion activity each week. Note that the discussion forum should be viewed as many times as possible during the week, so that comments and questions might be raised. Treat the discussion forum as a conversation where you supply at least one detailed response, and 5 comments or questions per week.

This course will consist of three basic student requirements:

Preparation and Participation (Class Discussions) (30% of Final Grade Calculation)

The discussion aspect of the class will consist of topics to be discussed every week. Students are expected to participate, offering researched comments and information. Assignments are based partially on the text, and on problems offered by Dr. Beser. Verilog programming may be required to complete the assignment or perform the discussion forum.

Each student is responsible for carefully reading all assigned material and being prepared for discussion. The majority of readings are from the course text. Additional reading may be assigned to supplement text readings.

Post your initial response to the discussion questions by the evening of day 3 for that module week. Posting a response to the discussion question is part one of your grade for class discussions (i.e., Timeliness).

Part two of your grade for class discussion is your interaction (i.e., responding to classmate postings with thoughtful responses) with at least two classmates (i.e., Critical Thinking). Just posting your response to a discussion question is notsufficient; we want you to interact with your classmates. Be detailed in your postings and in your responses to your classmates' postings.

Feel free to agree or disagree with your classmates. Please ensure that your postings are civil and constructive. Please understand that the discussion group is an exploration of the topic. All comments should be constructive, and respeective of the participants. A lack of civility will result in a F for that session.

Dr. Beser will monitor class discussions and will respond to some of the discussions as discussions are posted. In some instances, Dr. Beser will summarize the overall discussions and post the summary for the class.

Evaluation of preparation and participation is based on contribution to discussions. Preparation andparticipation is evaluated by the following grading elements:

1. Timeliness (50%)
2. Critical Thinking (50%)

Preparation and participation is graded as follows:

100–90 = A—Timeliness [regularly participates; all required postings; early in discussion; throughout the discussion]; Critical Thinking [rich in content; full of thoughts, insight, and analysis].

89–80 = B—Timeliness [frequently participates; all required postings; some not in time for others to read and respond]; Critical Thinking [substantial information; thought, insight, and analysis has taken place].

79–70 = C—Timeliness [infrequently participates; all required postings; most at the last minute without allowing for response time]; Critical Thinking [generally competent; information is thin and commonplace].

Note, that the grading criteria as staged is very subjective. As a rule of thumb for the students, I have adopted a simpler approach. Please don’t misunderstand that the grading criteria is just a quantity measure. I am looking for responses thatadd to the class understanding of the problem or help a classmate with a question. Here is a more quantitative rubric:

• 5 - 6 you will probably get a 10 if you turned in a good post, and helped out the discussion.
• 4 you will probably get a 9 if you turned in a good post, but If you didn't you would probably get a 7-8depending on what you posted.
• 3 - If you turned in a good post, you will probably get a 7 (I have been very generous up to now). You can also geta 5-6 if you did not do a detailed post.
• 2 - You will get a 6 if you turned in a good post, and a 5 if you didn't.
• 1 - you will get a 5 if you turned in a good post, and 4 if you didn't.
• 0 - You will get a 0.

If you treat the discussion forum as a conversation, and not a polished report for each post, you will find that talking to your classmates will get you more than enough posts for the week, and give you an opportunity to explore the topics with the class. Please don’t save your posts for Sunday night at 10:00pm. You can’t start a conversation while walking out the door.

Assignments (40% of Final Grade Calculation)

Assignments will include a mix of qualitative assignments (e.g. literature reviews, model summaries), quantitative problem sets, and MATLAB programming problems. Include a cover sheet with your name and assignment identifier. Also include your name and a page number indicator (i.e., page x of y) on each page of your submissions. Each problem should have the problem statement, assumptions, computations, and conclusions / discussion delineated. AllFigures and Tables should be captioned and labeled appropriately.

All assignments are due according to the dates in the Calendar.

Late submissions will be reduced by one letter grade for each week late (no exceptions without prior coordination with the instructor).

If, after submitting a written assignment a student is not satisfied with the grade received, the student is encouraged to redo the assignment and resubmit it. If the resubmission results in a better grade, that grade will be substituted for the previous grade.

Qualitative assignments are evaluated by the following grading elements:

1. Each part of question is answered (20%).
2. Writing quality and technical accuracy (30%) (Writing is expected to meet or exceed accepted graduate-level English and scholarship standards. That is, all assignments will be graded on grammar and style as well as content).
3. Rationale for answer is provided (20%).
4. Examples are included to illustrate rationale (15%) (If a student does not have direct experience related to a particular question, then the student is to provide analogies versus examples).
5. Outside references are included (15%). 

Qualitative Assignments are graded as follows:

100–90 = A—All parts of question are addressed; Writing Quality/ Rationale/ Examples/ Outside References [rich incontent; full of thought, insight, and analysis].

89–80 = B—All parts of the question are addressed; Writing Quality/ Rationale/ Examples/ Outside References [substantialinformation; thought, insight, and analysis has taken place].

79–70=C—Majority of parts of the question are addressed; Writing Quality/ Rationale/ Examples/ Outside References[generally competent; information is thin and commonplace]

<70=F—Some parts of the question are addressed; Writing Quality/ Rationale/ Examples/ Outside References[rudimentary and superficial; no analysis or insight displayed].

Quantitative assignments are evaluated by the following grading elements:

1. Each part of question is answered (20%).
2. Assumptions are clearly stated (20%).
3. Intermediate derivations and calculations are provided (25%).
4. Answer is technically correct and is clearly indicated (25%).
5. Answer precision and units are appropriate (10%). 

QuantitativeAssignments are graded as follows:

100–90 = A—All parts of question are addressed; All assumptions are clearly stated; All intermediate derivations andcalculations are provided; Answer is technically correct and is clearly indicated; Answer precision and units are appropriate.

89–80 = B—All parts of question are addressed; All assumptions are clearly stated; Some intermediate derivations and calculations are provided; Answer is technically correct and is indicated; Answer precision and units are appropriate.

79–70=C—Most parts of question are addressed; Assumptions are partially stated; Few intermediate derivations and calculations are provided; Answer is not technically correct but is indicated; Answer precision and units are indicated but inappropriate.

<70=F—Some parts of the question are addressed; Assumptions are not stated; Intermediate derivations and calculations are not provided; The answer is incorrect or missing; The answer precision and units are inappropriate or missing. 

Presentationa and Project Report (30% of Final grade Calculation)

In the place of exams, the class will do a research project and paper. The topics will be suggested during the first 6 weeks of the class, and the student will turn in a preliminary proposal by week 6 (Module 6). The proposal will follow a template that will be provided to the class (Follows the classic Indepented Research and Development Proposal Outline). At the end of Module 9, the student will turn in a status report. The status report could be a simple summary of progress made to date, or be a completely new proposal. By the end of Module 9, the project topic will be frozen. It should be noted that Module 12 and 13 will not include homework, and that the discussion topic will be lighter than previous weeks, so that the student may have sufficient time to finish the research paper and presentation.

Note: Depending on the number of students enrolled and the number of sections, project presentations may not be feasible for live zoom meetings. In that case, the projects may be pre-recorded and then posted to TEAMS. Groups of up to 6 presentations per TEAM will be collected. Students will be expected to ask questions to at least 5 presentations on TEAM during Module 14. The papers will be turned in by the end of the module.

The grading of the presentation will be based on meeting the objectives set out in the proposal. (Note that the reason that the student can repropose by week 9, is that the scope of the project can be reduced to meet reality.) There are four elements in the grade (project proposal, project status report (or new proposal), Project paper, and Project presentation. All students are expected to present at the end for the grade.

Grading Policy

Student assignments are due according to the dates in the Calendar. Dr. Beser will post grades one week after assignment due dates.

We generally do not directly grade spelling and grammar. However, egregious violations of the rules of the English language will be noted without comment. Consistently poor performance in either spelling or grammar is taken as an indication of poor writtencommunication ability that may detract from your grade.

A grade of A indicates achievement of consistent excellence and distinction throughout the course—that is, conspicuous excellencein all aspects of assignments and discussion in every week.

A grade of B indicates work that meets all course requirements on a level appropriate for graduate academic work. These criteria applyto both undergraduates and graduate students taking the course.

Course Policies

Courteous and Civil Behavior During Discussion Group

The discussion board is a critical element of the class work. It is a time of exploration of a topic. A friendly discussion where ideas and concepts are freely exchanged is the primary goal. At no time should a student feel intimated or threatened during this activity. Dr. Beser expects that the students will exercise restraint in critical comments. Comments should be constructive, polite, and should demonstrate a respect for the class. Poor behavior will not be tolerated. Continued bad behavior will result in expulsion.

Academic Policies

Deadlines for Adding, Dropping and Withdrawing from Courses

Students may add a course up to one week after the start of the term for that particular course. Students may drop courses according to the drop deadlines outlined in the EP academic calendar (https://ep.jhu.edu/student-services/academic-calendar/). Between the 6th week of the class and prior to the final withdrawal deadline, a student may withdraw from a course with a W on their academic record. A record of the course will remain on the academic record with a W appearing in the grade column to indicate that the student registered and withdrew from the course.

Academic Misconduct Policy

All students are required to read, know, and comply with the Johns Hopkins University Krieger School of Arts and Sciences (KSAS) / Whiting School of Engineering (WSE) Procedures for Handling Allegations of Misconduct by Full-Time and Part-Time Graduate Students.

This policy prohibits academic misconduct, including but not limited to the following: cheating or facilitating cheating; plagiarism; reuse of assignments; unauthorized collaboration; alteration of graded assignments; and unfair competition. Course materials (old assignments, texts, or examinations, etc.) should not be shared unless authorized by the course instructor. Any questions related to this policy should be directed to EP’s academic integrity officer at ep-academic-integrity@jhu.edu.

Students with Disabilities - Accommodations and Accessibility

Johns Hopkins University values diversity and inclusion. We are committed to providing welcoming, equitable, and accessible educational experiences for all students. Students with disabilities (including those with psychological conditions, medical conditions and temporary disabilities) can request accommodations for this course by providing an Accommodation Letter issued by Student Disability Services (SDS). Please request accommodations for this course as early as possible to provide time for effective communication and arrangements.

For further information or to start the process of requesting accommodations, please contact Student Disability Services at Engineering for Professionals, ep-disability-svcs@jhu.edu.

Student Conduct Code

The fundamental purpose of the JHU regulation of student conduct is to promote and to protect the health, safety, welfare, property, and rights of all members of the University community as well as to promote the orderly operation of the University and to safeguard its property and facilities. As members of the University community, students accept certain responsibilities which support the educational mission and create an environment in which all students are afforded the same opportunity to succeed academically. 

For a full description of the code please visit the following website: https://studentaffairs.jhu.edu/policies-guidelines/student-code/

Classroom Climate

JHU is committed to creating a classroom environment that values the diversity of experiences and perspectives that all students bring. Everyone has the right to be treated with dignity and respect. Fostering an inclusive climate is important. Research and experience show that students who interact with peers who are different from themselves learn new things and experience tangible educational outcomes. At no time in this learning process should someone be singled out or treated unequally on the basis of any seen or unseen part of their identity. 
 
If you have concerns in this course about harassment, discrimination, or any unequal treatment, or if you seek accommodations or resources, please reach out to the course instructor directly. Reporting will never impact your course grade. You may also share concerns with your program chair, the Assistant Dean for Diversity and Inclusion, or the Office of Institutional Equity. In handling reports, people will protect your privacy as much as possible, but faculty and staff are required to officially report information for some cases (e.g. sexual harassment).

Course Auditing

When a student enrolls in an EP course with “audit” status, the student must reach an understanding with the instructor as to what is required to earn the “audit.” If the student does not meet those expectations, the instructor must notify the EP Registration Team [EP-Registration@exchange.johnshopkins.edu] in order for the student to be retroactively dropped or withdrawn from the course (depending on when the "audit" was requested and in accordance with EP registration deadlines). All lecture content will remain accessible to auditing students, but access to all other course material is left to the discretion of the instructor.