525.658.81 - Digital VLSI System Design

Expanded Course Description

The course is intended to be a survey of topics that are fundamental to the design and implementation of digital CMOS integrated circuits. We will start with CMOS device physics and manufacturing basics and then move on to transistor level design and analysis of basic CMOS logic elements. The initial analysis will focus on the most basic of circuits, the two transistor inverter, but then progress to designing more complicated gates such as NAND, NOR, and flip-flops. As part of our circuit design, we will also produce custom layout for several small circuits. Subsequently, we will discuss other digital arithmetic topics and transition to higher levels of design abstraction with a basic overview of computer architecture and the Verilog hardware design language. Finally, we will use Verilog to work through a more automated design flow that uses logic synthesis followed by automated placement and routing of the resulting circuits. With such a broad array of topics, we do not dwell on any one area for a long period of time. However, by the end of the course, the student should have familiarity with the basics of an automated digital design flow, along with the foundational knowledge in device operation, manufacturing, and circuit design to understand the underlying details.

Course Structure

We will typically cover a new topic or module each week, with each module released on Monday. The lectures have been recorded at the JHU Homewood campus and feature Professor Ralph EtienneCummings teaching a similar course on Digital VLSI design. Although Dr. Etienne-Cummings delivers the lectures, please refer to the Instructor regarding questions and assistance for this course.

In addition to the lecture material, we will have a supplementary Discussion topic each week that will require participation in the course’s discussion forums. Often these discussions will be supplementary in nature, asking the student to look into current topics of interest in the field to augment the fundamentals presented in the module.

The Course Outline document has an overview of the topics to be discussed for each week. In general, as we move through the course, we will start at lower levels of abstraction (device physics and CMOS manufacturing) to higher levels of abstraction (Verilog HDL and computer architecture).

Course Topics

• Overview of digital systems history and role of energy/power
• Semiconductor and MOSFET device physics
• MOSFET deviations from ideal behavior
• Overview of CMOS processing
• CMOS inverter design and analysis
• CMOS inverter non-ideal behavior and scaling impacts
• CMOS combinational logic
• Non-CMOS alternative logic types
• CMOS sequential logic/flip-flops
• Computer Architecture
• Verilog HDL design and simulation
• Arithmetic Circuits
• Automated logic synthesis
• Automated Placement and routing tools
• Interconnect/wiring

Course Goals

By the end of the course, you will be able to:

1. Apply fundamentals of MOSFET device operation to digital integration circuit design.
2. Apply knowledge of CMOS integrated circuit fabrication throughout the design process.
3. Design digital CMOS logic gates at the transistor level in order to verify their operation via simulation.
4. Design digital CMOS logic using Verilog HDL.
5. Perform physical design of CMOS integrated circuits using both custom layout and standard cell approaches.
6. Determine the impact of technology scaling and non-idealities that affect device performance.
7. Complete the logical and physical design of a more complex digital system building using a standard cell design flow.

Course Learning Outcomes (CLOs)

• Design of basic CMOS digital circuits, with simulation for verification
• Custom layout of CMOS circuits
• Basic digital system design using Verilog HDL, with simulation for verification
• Use of synthesis, placement, and routing tools to generate digital circuit layout

Textbooks

No required textbook for course. 

The lectures and first part of the course are based on the Rabaey textbook, which is referenced below. It is a classic VLSI textbook that is no longer in print. However, the fundamentals that the book covers are still relevant to today’s VLSI design flows. Used print copies are available online, as are soft copies. Students are encouraged to obtain a copy for reference but the lectures are entirely self-contained. All necessary equations and concepts are contained in the course slides.

Required Software

Students will not need to purchase any software, although we will use several programs that are specific to VLSI design. Students will be running the course software on a Linux cluster hosted by the Electrical and Computer Engineering Department on the JHU Homewood main campus in Baltimore, MD. A basic familiarity with the Linux operating system will be helpful, but it will be possible to learn a minimal set of Linux skills while taking the class. Students will need to use their personal computer system to access the Homewood systems using an Xwindows client or emulator such as MobaXterm. Details on access will be provided early in the semester. We will not be using the design software until several weeks into the semester.

Student Coursework Requirements

Each week’s material will take approximately 7–10 hours per week to complete. This time includes previewing and reviewing the material in the class textbook as well as completing assignments. Assignments will be a mix of written analysis as well as design activities completed using various software packages. This course will consist of three basic student requirements:

1. Assignments (45% of Final Grade Calculation)
Assignments will be given most weeks, with a normal due date that is one week later. Some will involve quantitative analysis while others will be more design oriented, with an increasing emphasis on design as the semester progresses. In addition, some short answer questions may also be part of the assignment. Grading criteria will be published with each assignment. In general, assignments should be handed in by their due date, regardless of their state of completion. Students receiving less than an 80% will have the opportunity to resubmit a corrected version the assignment to raise their grade to the 80% mark. Late submissions will be accepted without penalty by prior arrangement due to work activities, illness, vacation, etc.

2. Weekly Discussions (15% of Final Grade Calculation)
Most weeks will have an asynchronous online discussion on topics related to integrated circuit design and technology. Students may need to gather information independently for the discussions, which will be held on the course Canvas discussion forums. Grading of weekly discussions will focus on timeliness and the amount of thought/insight evidenced by the submissions. Since the discussion topics are often more open ended and/or forward looking, students are not expected to have mastered the discussion topics, but merely to have shown engagement and initiative in their answers.

3. Mid-Term Exam (20% of Final Grade Calculation)
The only exam for the course is a mid-term, which will be completed by students outside of class in lieu of a weekly assignment. The mid-term will cover the fundamentals of the course to that point and is intended to test the student’s mastery of the course’s core concepts.

4. Course Project (20% of Final Grade Calculation) A course project will be assigned and will be due at the end of the semester. The project will essentially be a larger, more challenging design that covers part or all of a VLSI chip. The design project will encompass both circuit design and layout. Grading for the project will incorporate functionality as well as overall organization and documentation.

Grading Policy

Assignments are due according to the dates given when the assignment is distributed, usually one week later with the exception of the final project. Due dates will also be posted in the Canvas course site. You may check these due dates in the Course Calendar or the Assignments in the corresponding modules.

Academic Policies

Deadlines for Adding, Dropping and Withdrawing from Courses

Students may add a course up to one week after the start of the term for that particular course. Students may drop courses according to the drop deadlines outlined in the EP academic calendar (https://ep.jhu.edu/student-services/academic-calendar/). Between the 6th week of the class and prior to the final withdrawal deadline, a student may withdraw from a course with a W on their academic record. A record of the course will remain on the academic record with a W appearing in the grade column to indicate that the student registered and withdrew from the course.

Academic Misconduct Policy

All students are required to read, know, and comply with the Johns Hopkins University Krieger School of Arts and Sciences (KSAS) / Whiting School of Engineering (WSE) Procedures for Handling Allegations of Misconduct by Full-Time and Part-Time Graduate Students.

This policy prohibits academic misconduct, including but not limited to the following: cheating or facilitating cheating; plagiarism; reuse of assignments; unauthorized collaboration; alteration of graded assignments; and unfair competition. Course materials (old assignments, texts, or examinations, etc.) should not be shared unless authorized by the course instructor. Any questions related to this policy should be directed to EP’s academic integrity officer at ep-academic-integrity@jhu.edu.

Students with Disabilities - Accommodations and Accessibility

Johns Hopkins University values diversity and inclusion. We are committed to providing welcoming, equitable, and accessible educational experiences for all students. Students with disabilities (including those with psychological conditions, medical conditions and temporary disabilities) can request accommodations for this course by providing an Accommodation Letter issued by Student Disability Services (SDS). Please request accommodations for this course as early as possible to provide time for effective communication and arrangements.

For further information or to start the process of requesting accommodations, please contact Student Disability Services at Engineering for Professionals, ep-disability-svcs@jhu.edu.

Student Conduct Code

The fundamental purpose of the JHU regulation of student conduct is to promote and to protect the health, safety, welfare, property, and rights of all members of the University community as well as to promote the orderly operation of the University and to safeguard its property and facilities. As members of the University community, students accept certain responsibilities which support the educational mission and create an environment in which all students are afforded the same opportunity to succeed academically. 

For a full description of the code please visit the following website: https://studentaffairs.jhu.edu/policies-guidelines/student-code/

Classroom Climate

JHU is committed to creating a classroom environment that values the diversity of experiences and perspectives that all students bring. Everyone has the right to be treated with dignity and respect. Fostering an inclusive climate is important. Research and experience show that students who interact with peers who are different from themselves learn new things and experience tangible educational outcomes. At no time in this learning process should someone be singled out or treated unequally on the basis of any seen or unseen part of their identity. 
 
If you have concerns in this course about harassment, discrimination, or any unequal treatment, or if you seek accommodations or resources, please reach out to the course instructor directly. Reporting will never impact your course grade. You may also share concerns with your program chair, the Assistant Dean for Diversity and Inclusion, or the Office of Institutional Equity. In handling reports, people will protect your privacy as much as possible, but faculty and staff are required to officially report information for some cases (e.g. sexual harassment).

Course Auditing

When a student enrolls in an EP course with “audit” status, the student must reach an understanding with the instructor as to what is required to earn the “audit.” If the student does not meet those expectations, the instructor must notify the EP Registration Team [EP-Registration@exchange.johnshopkins.edu] in order for the student to be retroactively dropped or withdrawn from the course (depending on when the "audit" was requested and in accordance with EP registration deadlines). All lecture content will remain accessible to auditing students, but access to all other course material is left to the discretion of the instructor.